1. Field of the Invention
The present invention relates to a forward synchronous rectifier control device and a forward synchronous rectifier circuit; in particular, to a forward synchronous rectifier control device and a forward synchronous rectifier circuit in which deadtime may be set by using an analog circuit.
2. Description of Related Art
FIG. 1 illustrates a diagram of a conventional forward coverter. The forward converter is provided with a transformer T1, and a primary side of the transformer T1 has an input voltage VIN is provided by a pre-stage circuit, a pulse width modulation controller PWM, an input filtering capacitor C1, an start-up resistor R1, an start-up capacitor C2, a current detecting resistor R2, rectifier diode D1 and a transistor switch Q1 controlled by pulse width modulation controller PWM. On the secondary side of transformer T1 has two output rectifier diodes D2, D3, an energy storage inductor L, an output filtering capacitor C3 and a voltage detector 10 consists of resistors R3 and R4.
In the above-mentioned forward converter, when initially started, an input voltage VIN begins to charge start-up capacitor C2 through start-up resistor R1. When the voltage potential in start-up capacitor C2 has been charged to a level enough for initiating pulse width modulation controller PWM, pulse width modulation controller PWM will start to operate. Pulse width modulation controller PWM adjusts a duty cycle of a control signal in accordance with a voltage detecting signal of output voltage VO from voltage detector 10 and the a current detecting signal for the input current from current detecting resistor R2, so as to tune the ratio of conducting and cutoff times in transistor switch Q1. When output voltage VO is below a predetermined voltage, the conducting time ratio in transistor switch Q1 will be increased; contrarily, when output voltage VO is above the predetermined voltage, the conducting time ratio in transistor switch Q1 will be reduced, thereby a stable output voltage VO can be outputted
When transistor switch Q1 is turned on, input voltage VIN provides power through transformer T1, stores power to start-up capacitor C2 through rectifier diode D1, and stores power to energy storage inductor L and output filtering capacitor C3 through rectifier diode D2. When transistor switch Q1 is turned off, start-up capacitor C2 releases power to provide pulse width modulation controller PWM for operation continously, while energy storage inductor L releases power to output filtering capacitor C3 via rectifier diode D3.
However, since there are forward voltage drop on rectifier diodes D2, D3 when current flows through, power loss thus appears. As a result, it is known, in prior art, that the rectifier diodes may be replaced with transistor switches, so as to reduce power loss therein.
Referring now to FIG. 2, wherein a diagram of a conventional forward synchronous rectifier circuit is shown, in which transistor switches Q2, Q3 are used to replace rectifier diodes D2, D3 in FIG. 1. A synchronous rectifier controller Con controls the conducting and cutoff times of transistor switches Q2, Q3 based on the secondary side voltage of transformer T1.
FIG. 3 illustrates a signal timing diagram of a conventional forward synchronous rectifier circuit. In conjunction with FIGS. 2 and 3 for references, the secondary side voltage of transformer T1 is VD, and synchronous rectifier controller Con detects voltage VD of transformer T1 and generates a reference signal S. Synchronous rectifier controller Con provides a clock signal, and based on this clock signal counts the number of times voltage went positive or negative for the secondary side voltage VD. As shown in FIG. 3, in the first period, there are respectively n11 and n21 time periods, and in the second period, there are respectively n12 and n22 time periods, etc. Synchronous rectifier controller Con is also predetermined with two deadtime parameters x1 and x2 to be deducted from the above-mentioned counts, used as the time periods of conducting signal for transistor switch Q2 and transistor switch Q3 in the next period. For example, when the time period counts reaches n11 and n21 in the first period, then in the second period, the conducting time period of transistor switch Q2 is (n11−x1) clock signals length, and the conducting time period of transistor switch Q3 is (n21−x2) clock signals length. When the time period counts reaches n12 and n22 in the second period, then in the third period, the conducting time period of transistor switch Q2 is (n12−x1) clock signals length, and the conducting time period of transistor switch Q3 is (n22−x2) clock signals length, and so forth. Hence, it is possible to set the deadtime period multiplied by one clock signal length between transistor switch Q2 cutoff and transistor switch Q3 conducting, and set the deadtime period multiplied by two clock signal length between transistor switch Q3 cutoff and transistor switch Q2 conducting, so as to avoid any probable damages caused by simultaneous conductance at transistor switches Q2 and Q3.
However, the aforementioned deadtime period setting is to use the fixed time period provided by the clock signal, and the length of deadtime period set thereby is thus also fixed. For different applications, the switching frequency of pulse width modulation controller PWM on the primary side of the forward synchronous rectifier circuit does vary, and the appropriate deadtime length thereof necessarily changes. Therefore, the application range of the above-mentioned synchronous rectifier controller is restricted.